Semiconductor Engineering
@semiengineering
Deep insights for the chip industry. semiengineering.com Hot topics: semiconductor, EDA, advanced packaging, hardware, low power, HPC, hardware security, automotive chips, embedded, edge computing, semiconductor manufacturing, chip design, VLSI
Chip Industry Technical Paper Roundup semiengineering.com/chip-industr... #semiconductor
Semiconductor Engineering's latest special report semiengineering.com/rethinking-c... #semiconductor #verification #simulation #AI
Executive Outlook: Agentic AI’s Impact On Chip Design semiengineering.com/executive-ou... Part 1 of a panel discussion held in front of a live audience at the recent 2026 ESD Alliance Executive Outlook meeting. With experts from ChipAgents, Silvaco, Moores Lab AI, Silimate, Breker & Verific.
Chip Industry Technical Paper Roundup New technical papers recently added to Semiconductor Engineering’s library semiengineering.com/chip-industr... #semiconductor
Chip Industry Week In Review semiengineering.com/chip-industr... Onsemi to buy Synaptics; IBM’s 7Å chip w/40% more SRAM area; 1nm MoS2 nanotubes; memory updates; $250M CHIPS Act award; trade secret theft; new advanced packaging site; MEMS capacity; humanoids; earnings ... #semiconductor
Mask Economics Shape High-NA EUV Adoption (Final part in series) semiengineering.com/mask-economi... #semiconductor #photomasks #HighNAEUV #EUVlithography
New technical papers recently added to Semiconductor Engineering’s library semiengineering.com/chip-industr... #semiconductor
New technical papers recently added to Semiconductor Engineering’s library semiengineering.com/chip-industr... #semiconductor
Options Grow For Standardizing Data Movement And Sharing Resources semiengineering.com/options-grow... SemiEngineering sat down to discuss memory interfaces, interconnects, and memory access scaling with 4 industry experts at the recent IMAPS Memory Summit. #semiconductor #CXL #PCIe #UCIe
New technical papers recently added to Semiconductor Engineering’s library semiengineering.com/chip-industr... #semiconductor
NoC Coherency Challenges Balloon With AI SoCs And Chiplets: Complex chips need coherent and non-coherent sub-NoCs to ensure efficient data paths. Correct hierarchy is essential. semiengineering.com/noc-coherenc... #NoC #chiplets #cachecoherency
New CPU Memory Module Benefits and questions surrounding a next-gen low-power standard for high-performance compute. semiengineering.com/new-cpu-memo...
New technical papers recently added to Semiconductor Engineering’s library semiengineering.com/chip-industr... #semiconductor
Designing, developing, and manufacturing chips at 2nm and below requires a whole new set of business and technology tradeoffs that are dramatically more impactful at every turn, from architectural inception to manufacturing yield. semiengineering.com/challenges-i... #2nm #semiconductor
New technical papers recently added to Semiconductor Engineering’s library semiengineering.com/chip-industr... #semiconductor
New technical papers recently added to Semiconductor Engineering’s library semiengineering.com/chip-industr... #semiconductor
Tool Matching Getting Tougher Across Test & Metrology: New techniques are needed to keep pace with ever-shrinking features and tolerances. semiengineering.com/tool-matchin... #semiconductor
Verifying Scale-Up And Scale-Out In Data Centers Navigating a sea of standards and options in a rack and between racks. semiengineering.com/verifying-sc... #DataCenters #ScaleUp #ScaleOut
Back-End Automation Tackles Growing Complexity: As semiconductor packaging complexity rises, the industry faces gaps in data, inspection, and process integration. semiengineering.com/back-end-aut... #semiconductor
SemiEngineering's latest Low Power-High Performance newsletter semiengineering.com/newsletter/l... #NPUs #datacenters #GDDR7 #clockjitter #MIPI #PCIe #semiconductor
Semiconductor Engineering's latest Test, Measurement and Analytics newsletter semiengineering.com/newsletter/t... #semiconductor
Special Report: AI’s Impact On Engineering Jobs May Be Different Than Expected: Workflows & the addition of new capabilities are happening much faster than with previous technologies, & new grads may be vital in that transition semiengineering.com/ais-impact-o... #semiconductor #EDA #AgenticAI
Latest Semiconductor Engineering newsletter: Manufacturing, Packaging and Materials semiengineering.com/newsletter/m... #semiconductor #semiconductormanufacturing
New technical papers recently added to Semiconductor Engineering’s library: semiengineering.com/chip-industr... #semiconductor
You may find Semiconductor Engineering's Events page useful for planning your attendance at the best chip industry conferences in 2026. Good one to bookmark. semiengineering.com/semiconducto... #semiconductor
New technical papers recently added to Semiconductor Engineering’s library semiengineering.com/chip-industr... #semiconductor #DDR5 #powergating #chiplets #MEMS
Reliability Risks Shift To The Materials Stack: How polymer behavior, panel mechanics, and thermal coupling affect reliability in 3D integration. semiengineering.com/reliability-... #semiconductor
New technical papers recently added to Semiconductor Engineering’s library semiengineering.com/chip-industr... #AI #quantum #chiplets #semiconductor
Semiconductor Engineering's latest special report semiengineering.com/chiplets-vs-... #chiplets
Optimizing AI Workloads For Edge Computing Performance enhancement, cost reduction, data security, and improved energy efficiency are the end goals for optimizing AI workloads at the edge. Part 2 of series with 6 experts. semiengineering.com/optimizing-a... #edgecomputing #AIworkloads